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1/54 july 2002 lri512 memory tag ic 512 bit high endurance eeprom 13.56mhz, iso 15693 standard compliant with e.a.s. features summary n iso15693 standard: fully compliant n 13.56 mhz 7 khz carrier frequency n to the lri512: 10% or 100% ask modulation using: C 1/4 pulse position coding (26 kbit/s) C 1/256 pulse position coding (1.6 kbit/s) n from the lri512: load modulation using manchester coding with 423 khz and 484 khz subcarrier in: C fast data rate (26 kbit/s) C low data rate (6.6 kbit/s) n internal tuning capacitor n 512 bits eeprom with block lock feature n 64-bit unique identifier (uid) n eas features n read block and write block (32-bit blocks) n 5 ms programming time (typical) n more than 100,000 erase/write cycles n more than 40 year data retention figure 1. delivery forms wafer antenna (a1t/isor, a1s/isor) antenna (c40) antenna (a2t/isok)
lri512 2/54 summary description the lri512 is a contactless memory, powered by an externally transmitted radio wave. it is fully compliant with the iso15693 recommendation for radio-frequency power and signal interface. the lri512 contains 512 bits of electrically erasable programmable memory (eeprom). the memory is organized as 16 blocks of 32 bits. figure 2. logic diagram the lri512 is accessed by modulating the 13.56 mhz carrier frequency. incoming data are demodulated from the received signal amplitude modulation (ask, amplit ude shift keying). the received ask wave is 10% or 100% modulated (amplitude modulation). the data transfer rate is 1.6 kbit/s using the 1/256 pulse coding mode and 26 kbit/s using the 1/4 pulse coding modes. outgoing data are generated by antenna load variation, using the manchester coding, using one or two sub-carrier frequencies at 423 khz and 484 khz. the data transfer rate is 6.6 kbit/s, in the low data rate mode, and 26 kbit/s, in the fast data rate mode. table 1. signal names memory mapping the lri512 is divided in 16 blocks of 32 bits. each block can be individually write protected using a specific lock command. table 2. lri512 memory map the user area consists of blocks that are always accessible in read. write commands are pos- sible if the addressed block is not locked. during a write, the 32 bits of the block are replaced by the new 32-bit value. the lri512 also has a 64-bit block that is used to store the 64-bit unique identifier (uid). this uid is compliant to the iso15963 description, and its val- ue is used during the anti-collision sequence (in- ventory). this block is not accessible by the user, and the value is written by st on the produc- tion line. the lri512 also has an afi register in which the application family identifier is stored, for use in the anti-collision algorithm. ac1 antenna coil ac0 antenna coil ai04008b ac1 lri512 ac0 power supply regulator manchester load modulator ask demodulator 512 bit eeprom addr 0 7 8 15 16 23 24 31 0 user area 1 user area 2 user area 3 user area 4 user area 5 user area 6 user area 7 user area 8 user area 9 user area 10 user area 11 user area 12 user area 13 user area 14 user area 15 user area uid 0 uid 1 uid 2 uid 3 uid 4 uid 5 uid 6 uid 7 afi
3/54 lri512 commands the lri512 supports the following commands: C inventory : used to perform the anti-collision sequence. C stay quiet: to put the lri512 in quiet mode. the lri512 is then deselected and does not re- spond to any command. C select: used to select the lri512. after this command, the lri512 processes all read/ write commands with the select_flag set. C reset to ready: to put the lri512 in the ready state. C read block: to output the 32 bits of the se- lected block and its locking status. C write block: to write the 32-bit value in the selected block, provided that it is not locked. C lock block: to lock the selected block. after this command, the block cannot be modified. C write afi: to write the 8-bit value in the afi register, provided that it is not locked. C lock afi: to lock the afi register. C activate eas: to set the non volatile eas bit. when the eas bit is set, the lri 512 answers to the pool eas command. C deactivate eas: to reset the non volatile eas bit, so that the lri512 no longer answers to the pool eas command. C pool eas : used to request all lri512s in the reader field to generate the eas signal, provid- ed that their eas bit is set. initial dialogue for vicinity cards the dialogue between the vicinity coupling de- vice (vcd) and the vicinity integrated circuit card (lri512) is conducted through the following con- secutive operations: C activation of the lri512 by the rf operating field of the vcd. C transmission of a command by the vcd. C transmission of a response by the lri512. these operations use the rf power transfer and communication signal interface specified in the fol- lowing paragraphs. this technique is called read- er talk first (rtf). power transfer power transfer to the lri512 is accomplished by radio frequency at 13.56 mhz via coupling anten- nas in the lri512 and in the vcd. the rf operat- ing field of the vcd is transformed on the lri512 antenna as an ac voltage which is re-dressed, fil- tered and internally regulated. the amplitude modulation (ask) on this received signal is de- modulated by the ask demodulator. frequency the iso15693 standard defines the carrier fre- quency ( f c ) of the operating field to be 13.56 mhz 7 khz. operating field the lri512 operates continuously between h min and h max . C the minimum operating field is h min and has a value of 150 ma/m rms. C the maximum operating field is h max and has a value of 5 a/m rms. a vcd shall generate a field of at least h min and not exceeding h max in the operating volume.
lri512 4/54 communication signal from vcd to lri512 since the lri512 is fully compliant with the iso15693 recommendation, the descriptions and illustrations that follow are very heavily based on those of the iso/iec documents: iso/iec 15693- 2:2000(e) and iso/iec 15693-3:2001(e). this has been done with the kind permission of the iso copyright office. communications between the vcd and the lri512 takes place using the modulation principle of ask (amplitude modulation). two modulation indices are used, 10% and 100%. the lri512 de- codes both. the vcd determines which index is used. the modulation index is defined as [a-b]/[a+b] where a and b are the peak and minimum signal amplitude, respectively, of the carrier frequency. depending of the choice made by the vcd, a pause will be created as described in figure 3 and figure 4. the lri512 is operational for any degree of mod- ulation index from between 10% and 30%. figure 3. 100% modulation waveform table 3. 10% modulation parameters figure 4. 10% modulation waveform hr 0.1 x (a-b) max hf 0.1 x (a-b) max ai06683 trff trfsbl trfr 105% a t 100% 95% 60% 5% ai06655 trff trfsfl trfr hr hf ab t
5/54 lri512 data rate and data coding the data coding implemented in the lri512 uses pulse position modulation. both data coding modes that are described in the iso15693 are supported by the lri512. the selection is made by the vcd and indicated to the lri512 within the start of frame (sof). data coding mode: 1 out of 256 the value of one single byte is represented by the position of one pause. the position of the pause on 1 of 256 successive time periods of 18.88 s (256/f c ), determines the value of the byte. in this case the transmission of one byte takes 4.833 ms and the resulting data rate is 1.65 kbit/s (f c /8192). figure 5 illustrates this pulse position modulation technique. in this figure, data e1h (225d) is sent by the vcd to the lri512. the pause shall occur during the second half of the position of the time period that determines the value, as shown in figure 6. a pause during the first period transmit the data value 00h. a pause during the last period transmits the data value ffh (255d). figure 5. 1 out of 256 coding mode figure 6. detail of one time period ai06656 0 1 2 3 . . . . . . . . 2 . . . . . . . . . . . . . . . . . . . . . 2 2 2 2 . . . . . . . . . 2 . . . . . . . . . . . . . . . . . . . . . 5 5 5 5 . . . . . . . . . 5 . . . . . . . . . . . . . . . . . . . . . 2 3 4 5 4.833 ms 18.88 s 9.44 s pulse modulated carrier ai06657 2 2 5 18.88 s 9.44 s pulse modulated carrier 2 2 6 2 2 4 . . . . . . . . . . . . . . time period one of 256
lri512 6/54 data coding mode: 1 out of 4 the value of 2 bits is represented by the position of one pause. the position of the pause on 1 of 4 successive time periods of 18.88 s (256/f c ), de- termines the value of the 2 bits. four successive pairs of bits form a byte, where the least significant pair of bits is transmitted first. in this case the transmission of one byte takes 302.08 s and the resulting data rate is 26.48 kbit/ s (f c /512). figure 7 illustrates the 1 out of 4 pulse position technique and coding. figure 7. 1 out of 4 coding mode for example figure 8 shows the transmission of e1h (225d, 1110 0001b) by the vcd. figure 8. 1 out of 4 coding example ai06658 9.44 s 9.44 s 75.52 s 28.32 s 9.44 s 75.52 s 47.20s 9.44 s 75.52 s 66.08 s 9.44 s 75.52 s pulse position for "00" pulse position for "11" pulse position for "10" (0=lsb) pulse position for "01" (1=lsb) ai06659 75.52 s 75.52 s 75.52 s 75.52 s 00 10 01 11
7/54 lri512 vcd to lri512 frames frames are delimited by a start of frame (sof) and an end of frame (eof) and are implemented using code violation. unused options are reserved for future use. the lri512 is ready to receive a new command frame from the vcd after a delay of t 2 after having sent a response frame to the vcd (as specified in table 59). the lri512 generates a power-on delay of t mincd after being activated by the powering field (as specified in table 59). after this delay, the lri512 is ready to receive command frames from the vcd. start of frame (sof) the sof defines the data coding mode the vcd is to use for the following command frame. the sof sequence described in figure 9 selects the 1 out of 256 data coding mode. the sof sequence described in figure 10 selects the 1 out of 4 data coding mode. the eof sequence for either coding mode is de- scribed in figure 11. figure 9. sof to select 1 out of 256 data coding mode figure 10. sof to select 1 out of 4 data coding mode figure 11. eof for either data coding mode ai06661 37.76 s 9.44 s 9.44 s 37.76 s ai06660 37.76 s 9.44 s 9.44 s 37.76 s 9.44 s ai06662 9.44 s 37.76 s 9.44 s
lri512 8/54 communications signal from lri512 to vcd for some parameters several modes have been defined in order to allow for use in different noise environments and application requirements. load modulation the lri512 is capable of communication to the vcd via an inductive coupling area in which the carrier is loaded to generate a subcarrier with fre- quency f s . the subcarrier is generated by switch- ing in a load in the lri512. subcarrier the lri512 supports the one subcarrier and two subcarriers response formats. these formats are selected by the vcd using the first bit in the proto- col header. when one subcarrier is used, the frequency f s 1 of the subcarrier load modulation is 423.75khz (f c / 32). when two subcarriers are used, the frequency f s 1 is 423.75 khz (f c /32), and the frequency f s 2 is 484.28 khz (f c /28). when using the two subcarri- ers mode, the lri512 generates a continuous phase relationship between f s 1 and f s 2. data rates the lri512 can respond using the low or the high data rate format. the selection of the data rate is made by the vcd using the second bit in the pro- tocol header. table 4 shows the different data rates the lri512 can achieve using each combination. table 4. response data rate data rate one subcarrier two subcarriers low 6.62 kbit/s (f c /2048) 6.67 kbit/s (f c /2032) high 26.48 kbit/s (f c /512) 26.69 kbit/s (f c /508)
9/54 lri512 bit representation and coding data bits are encoded using manchester coding, according to the following schemes. for the low data rate the same subcarrier frequen- cy or frequencies are used, in this case the num- ber of pulses shall be multiplied by 4 and all times will increase by this factor. bit coding using one subcarrier high data rate. a logic 0 starts with 8 pulses of 423.75 khz (f c /32) followed by an unmodulated time of 18,88s as shown in figure 12. figure 12. logic 0, high data rate a logic 1 starts with an unmodulated time of 18.88 s followed by 8 pulses of 423.75 khz (f c / 32) as shown in figure 13. figure 13. logic 1, high data rate low data rate. a logic 0 starts with 32 pulses of 423.75 khz (f c /32) followed by an unmodulated time of 75.52 s as shown in figure 14. figure 14. logic 0, low data rate a logic 1 starts with an unmodulated time of 75.52 s followed by 32 pulses of 423.75 khz (f c / 32) as shown in figure 15. figure 15. logic 1, low data rate ai06663 37.76 s ai06664 37.76 s ai06666 149.86 s (iso=151.04 s) ai06665 149.86 s (iso=151.04 s)
lri512 10/54 bit coding using two subcarriers high data rate. a logic 0 starts with 8 pulses of 423.75 khz (f c /32) followed by 9 pulses of 484.28 khz (f c /28) as shown in figure 16. figure 16. logic 0, high data rate a logic 1 starts with 9 pulses of 484.28 khz (f c /28) followed by 8 pulses of 423.75 khz (f c /32) as shown in figure 17. figure 17. logic 1, high data rate low data rate. a logic 0 starts with 32 pulses of 423.75 khz (f c /32) followed by 36 pulses of 484.28 khz (f c /28) as shown in figure 18. figure 18. logic 0, low data rate a logic 1 starts with 36 pulses of 484.28 khz (f c / 28) followed by 32 pulses of 423.75 khz (f c /32) as shown in figure 19. figure 19. logic 1, low data rate ai06670 37.46 s ai06669 37.46 s ai06668 149.86 s 0.3 s ai06667 149.86 s 0.3 s
11/54 lri512 lri512 to vcd frames frames are delimited by an sof and eof and are implemented using code violation. unused options are reserved for future use. for the low data rate, the same subcarrier fre- quency or frequencies are used. in this case the number of pulses shall be multiplied by 4. the vcd is ready to receive a response frame from the lri512 within less than t 1 after having sent a command frame (as specified in table 59). sof when using one subcarrier high data rate. sof comprises 3 parts: (see figure 20) C an unmodulated time of 56.64 s, C 24 pulses of 423.75 khz ( f c /32), C a logic 1 which starts with an unmodulated time of 18.88 s followed by 8 pulses of 423.75 khz. low data rate. sof comprises 3 parts: (see figure 21) C an unmodulated time of 226.56 s, C 96 pulses of 423.75 khz ( f c /32), C a logic 1 which starts with an unmodulated time of 75.52 s followed by 32 pulses of 423.75 khz. figure 20. start of frame, high data rate, one subcarrier figure 21. start of frame, low data rate, one subcarrier ai06671 113.28 s 37.76 s ai06672 453.12 s 149.86 s (iso=151.04 s)
lri512 12/54 sof when using two subcarriers high data rate. sof comprises 3 parts: (see figure 22) C 27 pulses of 484.28 khz ( f c /28), C 24 pulses of 423.75 khz ( f c /32), C a logic 1 which starts with 9 pulses of 484.28 khz followed by 8 pulses of 423.75 khz. low data rate. sof comprises 3 parts: (see figure 23) C 108 pulses of 484.28 khz ( f c /28), C 96 pulses of 423.75 khz ( f c /32), C a logic 1 which starts with 36 pulses of 484.28 khz followed by 32 pulses of 423.75 khz. figure 22. start of frame, high data rate, two subcarriers figure 23. start of frame, low data rate, two subcarriers ai06673 112.39 s 37.76 s (iso=37.46 s) ai06674 449.56 s 149.86 s 0.3 s
13/54 lri512 eof when using one subcarrier high data rate. eof comprises 3 parts: (see figure 24) C a logic 0 which starts with 8 pulses of 423.75 khz followed by an unmodulated time of 18.88 s. C 24 pulses of 423.75 khz ( f c /32), C an unmodulated time of 56.64 s. low data rate. eof comprises 3 parts: (see figure 25) C a logic 0 which starts with 32 pulses of 423.75 khz followed by an unmodulated time of 75.52 s. C 96 pulses of 423.75 khz ( f c /32), C an unmodulated time of 226.56 s. figure 24. end of frame, high data rate, one subcarrier figure 25. end of frame, low data rate, one subcarrier ai06675 113.28 s 37.76 s ai06676 453.12 s 151.04 s
lri512 14/54 eof when using two subcarriers high data rate. eof comprises 3 parts: (see figure 26) C a logic 0 which starts with 8 pulses of 423.75 khz followed by 9 pulses of 484.28 khz, C 24 pulses of 423.75 khz ( f c /32), C 27 pulses of 484.28 khz ( f c /28). low data rate. eof comprises 3 parts: (see figure 27) C a logic 0 which starts with 32 pulses of 423.75 khz followed by 36 pulses of 484.28 khz, C 96 pulses of 423.75 khz ( f c /32), C 108 pulses of 484.28 khz ( f c /28). figure 26. end of frame, high data rate, two subcarriers figure 27. end of frame, low data rate, two subcarriers ai06677 112.39 s 37.46 s ai06678 449.56 s 151.62 s (iso=149.86 s)
15/54 lri512 unique identifier (uid) the lri512s are uniquely identified by a 64-bit unique identifier (uid). this uid complies with iso/iec 15963 and iso/iec 7816-6. the uid is a read only code, and comprises: C the 8 msb is e0h C the ic manufacturer code of st 02h, on 8 bits (iso/iec 7816-6/am1) C a unique serial number on 48 bits. the uid is used for addressing each lri512 uniquely and individually, during the anti-collision loop and for one-to-one exchange between a vcd and a lri512. table 5. uid format application family identifier (afi) the afi (application family identifier) describes the type of application targeted by the vcd, and is used to extract from all the lri512s present only the lri512s meeting the required application cri- teria. it is programmed by the lri512 issuer in the afi register. once programmed and locked, it cannot be modified. the most significant nibble of afi is used to code one specific or all application families. the least significant nibble of afi is used to code one specific or all application sub-families. sub- family codes, other than 0, are proprietary. (see iso 15693-3 documentation) figure 28. lri512 decision tree for afi crc the crc used in the lri512 is calculated as per the definition in iso/iec 13239. the initial register content is all ones: ffffh. the 2-byte crc is appended to each request and each response, within each frame, before the eof. the crc is calculated on all the bytes after the sof up to the crc field. upon reception of a request from the vcd, the lri512 verifies that the crc value is valid. if it is invalid, it discards the frame, and does not answer the vcd. upon reception of a response from the lri512, it is recommended that the vcd verify that the crc value is valid. if it is invalid, actions to be per- formed are left to the responsibility of the vcd de- signer. the crc is transmitted least significant byte first. each byte is transmitted least significant bit first. table 6. crc transmission rules msb lsb 63 56 55 48 47 0 e0h 02h unique serial number ai06679 inventory request received no no answer yes no afi value = 0 ? yes no afi flag set ? yes answer given by the lri512 to the inventory request afi value = internal value ? lsbyte msbyte lsbit msbit lsbit msbit crc 16 (8bits) crc 16 (8 bits)
lri512 16/54 lri512 protocol description the transmission protocol defines the mecha- nism to exchange instructions and data between the vcd and the lri512, in both directions. it is based on the concept of vcd talks first. this means that any lri512 does not start trans- mitting unless it has received and properly decod- ed an instruction sent by the vcd. the protocol is based on an exchange of C a request from the vcd to the lri512 C a response from the lri512 to the vcd each request and each response is contained in a frame. the frame delimiters (sof, eof) are de- scribed in the previous paragraphs. each request consists of C request sof (see figure 9 and figure 10) C flags C a command code C parameters, depending on the command C application data C 2-byte crc C request eof (see figure 11) each response consists of C answer sof (see figure 20 to figure 23) C flags C parameters, depending on the command C application data C 2-byte crc C answer eof (see figure 24 to figure 27) the protocol is bit-oriented. the number of bits transmitted in a frame is a multiple of eight (8) C that is, an integer number of bytes. a single-byte field is transmitted least significant bit (lsbit) first. a multiple-byte field is transmitted least signifi- cant byte (lsbyte) first, each byte is transmitted least significant bit (lsbit) first. the setting of the flags indicates the presence of the optional fields. when the flag is set (to one), the field is present. when the flag is reset (to zero), the field is absent. table 7. vcd request frame format table 8. lri512 response frame format figure 29. lri512 protocol timing request sof request flags command code parameters data 2 bytes crc request eof response sof response flags parameters data 2 bytes crc response eof ai06830 vcd request frame (table 7) request frame (table 7) lri512 response frame (table 8) response frame (table 8) timing t1 t2 t1 t2
17/54 lri512 lri512 states a lri512 can be in one of four states: C power-off C ready C quiet Cselected transitions between these states are specified in figure 30 and table 9. power-off state the lri512 is in the power-off state when it does not receive enough energy from the vcd. ready state the lri512 is in the ready state when it receives enough energy from the vcd. it shall answer any request where the select_flag is not set. quiet state when in the quiet state, the lri512 answers any request other than an inventory request with the address_flag set. selected state in the selected state, the lri512 answers to any request in all modes: C request in select mode with the select flag set C request in addressed mode if the uid match. C request in non-addressed mode as it is gener- al request. table 9. lri512 response, depending on the states of the request flags flags address_flag select_flag 1 addressed 0 non addressed 1 selected 0 non selected lri512 in ready or selected state (devices in quiet state do not answer) xx lri512 in selected state x x lri512 in ready, quiet or selected state (the device which match the uid) xx error (03h) x x
lri512 18/54 figure 30. lri512 state transition diagram note: the intention of the state transition method is that only one lri512 should be in the selected state at a time. ai06681 power off in field out of field ready quiet selected any other command where select_flag is not set out of field out of field stay quiet(uid) select (uid) any other command any other command where the address_flag is set and where inventory_flag is not set stay quiet(uid) select (uid) reset to ready where select_flag is set or select(different uid) reset to ready
19/54 lri512 modes the set of lri512s that can answer a given re- quest are those whose current mode is the ap- propriate one for that request. addressed mode when the address_flag is set to 1 (addressed mode), the request shall contain the unique id (uid) of the addressed lri512. any lri512 receiving a request with the address_flag set to 1 shall compare the received unique id to its own uid. if it matches, it shall execute it (if possible) and re- turn a response to the vcd as specified by the command description. if it does not match, it shall remain silent. non-addressed mode (general request) when the address_flag is set to 0 (non-addressed mode), the request shall not contain a unique id. any lri512 receiving a request with the address_flag set to 0 executes it and returns a re- sponse to the vcd as specified by the command description. select mode when the select_flag is set to 1 (select mode), the request shall not contain a lri512 unique id. the lri512 in the selected state receiving a re- quest with the select_flag set to 1 executes it and returns a response to the vcd as specified by the command description. only lri512s in the selected state answer to a request having the select flag set to 1. the system design ensures in theory that only one lri512 can be in the select state.
lri512 20/54 request format the request consists of Csof C flags C a command code C parameters and data C crc Ceof table 10. general request format request flags in a request, the flags field specifies the actions to be performed by the lri512, and whether corre- sponding fields are present or not. it consists of eight bits. the bit 3 (inventory_flag) of the request flag de- fines the content of the 4 msbs (bits 5 to 8). when bit 3 is reset (0), bits 5 to 8 define the lri512 selection criteria. when bit 3 is set (1), bits 5 to 8 define the lri512 inventory parameters. table 11. request flags 1 to 4 definition note: 1. sub-carrier_flag refers to the lri512-to-vcd communi- cation. 2. data_rate_flag refers to the lri512-to-vcd communica- tion table 12. request flags 5 to 8 when bit 3 = 0 note: if the select_flag is set to 1, the address_flag shall be set to 0 and the uid field shall not be present in the request. table 13. request flags 5 to 8 when bit 3 = 1 s o f request flags command code parameters data crc e o f bit 1 sub-carrier flag 0 a single sub-carrier frequency shall be used by the lri512 1 two sub-carriers shall be used by the lri512 bit 2 data_rate flag 0 low data rate is used 1 high data rate is used bit 3 inventory flag 0 flags 5 to 8 meaning are according to table 12 1 flags 5 to 8 meaning are according to table 13 bit 4 protocol extension flag 0 no protocol format extension bit 5 select flag 0 request shall be executed by any lri512 according to the setting of address_flag 1 request shall be executed only by lri512 in selected state bit 6 address flag 0 request is not addressed. uid field is not present. it shall be executed by all lri512. 1 request is addressed. uid field is present. it shall be executed only by the lri512 whose uid matches the uid specified in the request. bit 7 option flag 0 bit 8 rfu 0 bit 5 afi flag 0 afi field is not present 1 afi field is present bit 6 nb_slots flag 0 16 slots 1 1 slot bit 7 option flag 0 bit 8 rfu 0
21/54 lri512 response format the response consists of Csof C flags C parameters and data C crc Ceof table 14. general response format response flags in a response, the flags field indicates how ac- tions have been performed by the lri512 and whether corresponding fields are present or not. it consists of eight bits. table 15. response flags 1 to 8 definition response error code if the error flag is set by the lri512 in the re- sponse, the error code field is present and pro- vides information about the error that occurred. the following error codes are specified. other codes are reserved for future use. table 16. response error code definition sof response flags parameters data crc eof bit 1 error flag 0 no error 1 error detected. error code is in the error field. bit 2 rfu 0 bit 3 rfu 0 bit 4 extension flag 0 no extension bit 5 rfu 0 bit 6 rfu 0 bit 7 rfu 0 bit 8 rfu 0 error code meaning 03h the option is not supported 10h the specified block is not available 11h the specified block is already locked and thus cannot be locked again 12h the specified block is locked and its content cannot be changed.
lri512 22/54 anti-collision the purpose of the anti-collision sequence is to in- ventory the lri512s present in the vcd field by their unique id (uid). the vcd is the master of the communication with one or multiple lri512s. it initiates lri512 com- munication by issuing the inventory request. the lri512 sends its response in the slot deter- mined, or might not respond. request parameters when issuing the inventory command, the vcd shall: C set the nb_slots_flag to the desired setting, C add after the command field the mask length and the mask value, C the mask length is the number of significant bits of the mask value. C the mask value is contained in an integer num- ber of bytes. the mask length indicates the number of significant bits. lsb shall be transmit- ted first. C if the mask length is not a multiple of 8 bits, the mask value msb shall be padded with the re- quired number of null bits (set to 0) so that the mask value is contained in an integer number of bytes. C the next field starts on the next byte boundary. table 17. inventory request format in the example of the table 18 and figure 31, the mask length is 11 bits. the mask value msb is padded with five bits set to 0. the 11 bits mask plus the current slot number is compared to the uid. table 18. example of the padding of a 11 bits mask value msb lsb sof request flags command optional afi mask length mask value crc eof 8 bits 8 bits 8 bits 8 bits 0 to 8 bytes 16 bits (b 15 ) msb lsb (b 0 ) 0000 0 100 1100 1111 pad 11 bits mask value
23/54 lri512 figure 31. principle of comparison between the mask, slot number and uid the afi field shall be present if the afi_flag is set. the pulse shall be generated according to the def- inition of the eof in iso/iec 15693-2. the first slot starts immediately after the reception of the request eof. to switch to the next slot, the vcd sends an eof. the following rules and restrictions apply: C if no lri512 answer is detected, the vcd may switch to the next slot by sending an eof C if one or more lri512 answers are detected, the vcd shall wait until the complete frame has been received before sending an eof for switching to the next slot. ai06682 mask value received in the inventory command 0000 0100 1100 1111 b 16 bits the mask value less the padding 0s is loaded into the tag comparator 100 1100 1111 b 11 bits the slot counter is calculated xxxx nb_slots_flags = 0 (16 slots), slot counter is 4 bits the slot counter is concatened to the mask value xxxx 100 1100 1111 b nb_slots_flags = 0 15 bits the concatenated result is compared with the least significant bits of the tag uid. xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx 64 bits lsb msb b lsb msb lsb msb lsb msb b0 b63 compare bits ignored uid 4 bits
lri512 24/54 request processing by the lri512 upon reception of a valid request, the lri512 performs the following algorithm, where: C nbs is the total number of slots (1 or 16) C sn is the current slot number (0 to 15) C lsb (value, n) function returns the n least signif- icant bits of the value C msb (value, n) function returns the n most sig- nificant bits of the value C & is the concatenation operator C slot_frame is either a sof or an eof sn = 0 if (nb_slots_flag) then nbs = 1 sn_length = 0 endif else nbs = 16 sn_length = 4 endif label1: if lsb(uid, sn_length + mask_length) = lsb(sn,sn_length)&lsb(mask,mask_length) then answer to inventory request endif wait (slot_frame) if slot_frame = sof then stop anticollision decode/process request exit endif if slot_frame = eof if sn < nbs-1 thensn = sn + 1 goto label1 exit endif endif explanation of the possible cases figure 32 summarizes the main possible cases that can occur during an anti-collision sequence when the slot number is 16. the different steps are: C the vcd sends an inventory request, in a frame, terminated by an eof. the number of slots is 16. C lri512 #1 transmits its response in slot 0. it is the only one to do so, therefore no collision oc- curs and its uid is received and registered by the vcd; C the vcd sends an eof, meaning to switch to the next slot. C in slot 1, two lri512s, #2 and #3, transmit their responses. this generates a collision. the vcd records it, and remembers that a collision was detected in slot 1. C the vcd sends an eof, meaning to switch to the next slot. C in slot 2, no lri512 transmits a response. therefore the vcd does not detect a lri512 sof and decides to switch to the next slot by sending an eof. C in slot 3, there is another collision caused by responses from lri512 #4 and #5 C the vcd then decides to send a request (for instance a read block) to lri512 #1, whose uid was already correctly received. C all lri512s detect a sof and exit the anti-colli- sion sequence. they process this request and since the request is addressed to lri512 #1, only lri512 #1 transmits its response. C all lri512s are ready to receive another re- quest. if it is an inventory command, the slot numbering sequence restarts from 0. note: the decision to interrupt the anti-collision se- quence is up to the vcd. it could have continued to send eofs until slot 15 and then send the re- quest to lri512 #1.
25/54 lri512 figure 32. description of a possible anti-collision sequence ai06831 slot 0 slot 1 slot 2 slot 3 vcd sof inventory request eof eof eof eof sof request to lri512 1 eof response 2 response 4 lri512s response from lri512 1 response 1 response 3 response 5 timing t1 t2 t1 t2 t3 t1 t2 t1 comment no collision collision no response collision time
lri512 26/54 timing definition t 1 : lri512 response delay t 1 is as defined in table 19. upon detection of the rising edge of the eof re- ceived from the vcd, the lri512 wait for a time equal to t 1 (typ) = 4352/f c (see table 59) before starting to transmit its response to a vcd request or switch to the next slot when in an inven- tory process. the eof is defined in page 7. t 2 : vcd new request delay t 2 is the time after which the vcd may send an eof to switch to the next slot when one or more lri512 responses have been received during an inventory command. it starts from the reception of the eof received from the lri512s. the eof sent by the vcd may be either 10% or 100% modulated independent of the modulation index used for transmitting the vcd request to the lri512. t 2 is also the time after which the vcd may send a new request to the lri512 as described in figure 29., lri512 protocol timing, on page 16. t 2 (min) = 4192/f c (see table 59) t3: vcd new request delay when no lri512 response t 3 is the time after which the vcd may send an eof to switch to the next slot when no lri512 re- sponse has been received. the eof sent by the vcd may be either 10% or 100% modulated independent of the modulation index used for transmitting the vcd request to the lri512. from the time the vcd has generated the rising edge of an eof: C if this eof is 100% modulated, the vcd shall wait a time at least equal to t 3minimum before sending a subsequent eof. C if this eof is 10% modulated, the vcd shall wait a time at least equal to the sum of t 3minimum + the nominal response time of a lri512, which depend on the lri512 data rate and subcarrier modulation mode before sending a subsequent eof. table 19. timing values (see table 59) note: 1. t sof is the duration for the lri512 to transmit an sof to the vcd. t sof is dependant on the current data rate: high data rate or low data rate. 2. t 1 (max) does not apply for write alike requests. timing conditions for write alike requests are defined in the com- mand description. 3. the tolerance of specific timings is 32/f c . min. nominal max. t 1 t 1 (min) t 1 (typ) t 1 (max) t 2 t 2 (min) t 3 t 1 (max) + t sof (notes 1,2 )
27/54 lri512 command codes the lri512 supports the following command codes: table 20. command codes command code function 0x01 inventory 0x02 stay quiet 0x20 read single block 0x21 write single block 0x22 lock block 0x25 select 0x26 reset to ready 0x27 write afi 0x28 lock afi 0xa0 activate eas 0xa1 de-activate eas 0xa2 pool eas
lri512 28/54 inventory command code = 0x01 when receiving the inventory request, the lri512 performs the anti-collision sequence. the inventory_flag shall be set to 1. the meaning of flags 5 to 8 is according to table 13., request flags 5 to 8 when bit 3 = 1, on page 20. the re- quest (table 21) contains: C flags, C inventory command code C afi if the afi flag is set C mask length C mask value C crc the response (table 22) contains: C flags C dsfid (always 00h) C unique id note on inventory operation. in the current lri512 device, it is not possible to use the full range of mask length capability to covert the com- plete inventory sequence. values above the ones mentioned are not allowed: C 16 slots mode (request flag b 6 =0): mask length must be in the range 0 to 27. C 1 slot mode (request flag b 6 =1): mask length must be in the range 0 to 20. stmicroelectronics programs the uid in such a way that it guarantees that the anti-collision se- quence is able to detect all lri512 in the reader field. table 21. inventory request format table 22. inventory response format request sof request flags inventory optional afi mask length mask value crc16 request eof 8 bits 0x01 8 bits 8 bits 0 - 64 bits 16 bits response sof response flags dsfid uid crc16 response eof 8 bits 0x00 64 bits 16 bits
29/54 lri512 stay quiet command code = 0x02 when receiving the stay quiet command, the lri512 enters the quiet state, and does not send back a response. there is no response to the stay quiet command. when in the quiet state: C the lri512 does not process any request if inventory_flag is set, C the lri512 processes any addressed re- quest the lri512 exits the quiet state when: C reset (power off) C receiving a select request. it then goes to the selected state C receiving a reset to ready request. it then goes to the ready state. the stay quiet command (table 23) shall always be executed in addressed mode (select_flag is set to 0 and address_flag is set to 1). table 23. stay quiet request format figure 33. stay quiet frame exchange between vcd and lri512 request sof request flags stay quiet uid crc16 request eof 8 bits 0x02 64 bits 16 bits ai06842 vcd sof stay quiet request eof
lri512 30/54 read single block command code = 0x20 when receiving the read single block command, the lri512 read the requested block and send back its 32 bits value in the response.the option_flag is supported. request parameter (table 24): C option_flag C uid (optional) C block number response parameter (table 25): C block locking status if option_flag is set C 4 bytes of block data response parameter (table 27): C error code as error_flag is set table 24. read single block request format table 25. read single block response format when error_flag is not set table 26. table 27. read single block response format when error_flag is set figure 34. read single block frame exchange between vcd and lri512 request sof request flags read single block uid block number crc16 request eof 8 bits 0x20 64 bits 8 bits 16 bits response sof response flags block locking status data crc16 response eof 8 bits 8 bits 32 bits 16 bits b 7 (bit b 0 for iso) b 6 b 5 b 4 b 3 b 2 b 1 b 0 0: current block not locked 1: current block locked reserved for future used. all at 0 response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06832 vcd lri512 t1 sof read single block request eof sof read single block response eof
31/54 lri512 write single block command code = 0x21 when receiving the write single block command, the lri512 writes the requested block with the data contained in the request, and reports the success of the operation in the response. the option_flag is not supported. during the write cycle, t w , no modulation (neither 100% nor 10%) shall occur, otherwise the lri512 may program the data incorrectly in the memory. the t w delay is a multiple of t 1nominal . request parameter (table 28): C uid (optional) C block number Cdata response parameter (table 29): C no parameter. the response is sent back af- ter the write cycle response parameter (table 30): C error code as error_flag is set table 28. write single block request format table 29. write single block response format when error flag is not set table 30. write single block response format when error flag is set figure 35. write single block frame exchange between vcd and lri512 request sof request flags write single block uid block number data crc16 request eof 8 bits 0x21 64 bits 8 bits 32 bits 16bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06833 vcd lri512 lri512 t1 eof sof write single block request eof sof write single block response write sequence when error sof write single block response eof t1 tw
lri512 32/54 lock block command code = 0x22 when receiving the lock block command, the lri512 lock permanently the requested block. the option_flag is not supported. during the write cycle t w , no modulation (never 100% nor 10%) shall occur. if so, the lri512 may not lock correctly the memory block. the t w delay is a multiple of t 1nominal . request parameter (table 31): C (optional) uid C block number response parameter (table 32): C no parameter. response parameter (table 33): C error code as error_flag is set table 31. lock single block request format table 32. lock block response format when error flag is not set table 33. lock block response format when error flag is set figure 36. lock block frame exchange between vcd and lri512 request sof request flags lock block uid block number crc16 request eof 8 bits 0x22 64 bits 8 bits 16 bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06834 vcd lri512 lri512 t1 eof sof eof sof lock sequence when error sof eof t1 tw lock block request lock block response lock block response
33/54 lri512 select command code = 0x25 when receiving the select command: C if the uid is equal to its own uid, the lri512 en- ter or stay in the selected state and send a re- sponse. C if it is different, the selected lri512 return to the ready state and do not send a response. request parameter (table 34): Cuid response parameter (table 35): C no parameter. response parameter (table 36): C error code as error_flag is set table 34. select request format table 35. select block response format when error flag is not set table 36. select response format when error flag is set figure 37. select frame exchange between vcd and lri512 request sof request flags select uid crc16 request eof 8 bits 0x25 64 bits 16 bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06835 vcd lri512 t1 eof sof eof sof select request select response
lri512 34/54 reset to ready command code = 0x26 when receiving a reset to ready command, the lri512 return to the ready state. request parameter (table 37): C uid (optional) response parameter (table 38): C no parameter. response parameter (table 39): C error code as error_flag is set table 37. reset to ready request format table 38. reset to ready response format when error flag is not set table 39. reset to ready response format when error flag is set figure 38. reset to ready frame exchange between vcd and lri512 request sof request flags reset to ready uid crc16 request eof 8 bits 0x26 64 bits 16 bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06836 vcd lri512 t1 sof reset to ready request eof sof reset to ready response eof
35/54 lri512 write afi command code = 0x27 when receiving the write afi request, the lri512 write the afi byte value into its memory. the option_flag is not supported. during the write cycle t w , no modulation (never 100% nor 10%) shall occur. if so, the lri512 may not write correctly the afi value into the memory. the t w delay is a multiple of t 1nominal . request parameter (table 40): C uid (optional) Cafi response parameter (table 41): C no parameter. response parameter (table 42): C error code as error_flag is set table 40. write afi request format table 41. write afi response format when error flag is not set table 42. write afi response format when error flag is set figure 39. write afi frame exchange between vcd and lri512 request sof request flags write afi uid afi crc16 request eof 8 bits 0x27 64 bits 8 bits 16 bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06837 vcd lri512 lri512 t1 eof sof eof sof write sequence when error sof eof t1 tw write afi request write afi response write afi response
lri512 36/54 lock afi command code = 0x28 when receiving the lock afi request, the lri512 lock the afi value permanently. the option_flag is not supported. during the write cycle t w , no modulation (never 100% nor 10%) shall occur. if so, the lri512 may not lock correctly the afi value into the memory. the t w delay is a multiple of t 1nominal . request parameter (table 43): C uid (optional) response parameter (table 44): C no parameter. response parameter (table 45): C error code as error_flag is set table 43. lock afi request format table 44. lock afi response format when error flag is not set table 45. lock afi response format when error flag is set figure 40. lock afi frame exchange between vcd and lri512 request sof request flags lock afi uid crc16 request eof 8 bits 0x28 64 bits 16 bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06838 vcd lri512 lri512 t1 eof sof eof sof lock sequence when error sof eof t1 tw lock afi request lock afi response lock afi response
37/54 lri512 activate eas command code = 0xa0 when receiving the activate eas request, the lri512 set the non-volatile eas bit. the option_flag is not supported. during the write cycle t w , no modulation (never 100% nor 10%) shall occur. if so, the lri512 may not set correctly the eas bit. the t w delay is a mul- tiple of t 1nominal . request parameter (table 46): C uid (optional) response parameter (table 47): C no parameter. response parameter (table 48): C error code as error_flag is set table 46. activate eas request format table 47. activate eas response format when error flag is not set table 48. activate eas response format when error flag is set figure 41. activate eas frame exchange between vcd and lri512 request sof request flags activate eas ic mfg code uid crc16 request eof 8 bits 0xa0 0x02 64 bits 16 bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06839 vcd lri512 lri512 t1 eof sof eof sof write sequence when error sof eof t1 tw activate eas request activate eas response activate eas response
lri512 38/54 desactivate eas command code = 0xa1 when receiving the de-activate eas request, the lri512 reset the non-volatile eas bit. the option_flag is not supported. during the write cycle t w , no modulation (never 100% nor 10%) shall occur. if so, the lri512 may not reset correctly the eas bit. the t w delay is a multiple of t 1nominal . request parameter (table 49): C uid (optional) response parameter (table 50): C no parameter. response parameter (table 51): C error code as error_flag is set table 49. de-activate eas request format table 50. de-activate eas response format when error flag is not set table 51. de-activate eas response format when error flag is set figure 42. de-activate eas frame exchange between vcd and lri512 request sof request flags de-activate eas ic mfg code uid crc16 request eof 8 bits 0xa1 0x02 64 bits 16 bits response sof response_flags crc16 response eof 8 bits 16 bits response sof response_flags error code crc16 response eof 8 bits 8 bits 16 bits ai06840 vcd lri512 lri512 t1 eof sof eof sof write sequence when error sof eof t1 tw de-activate eas request de-activate eas response de-activate eas response
39/54 lri512 pool eas command code = 0xa2 when receiving the pool eas request, all lri512 with the non-volatile eas bit set generate the eas signal. request parameter (table 52 or table 53): C no parameter table 52. pool eas request format for one sub-carrier modulation answer table 53. pool eas request format for two sub-carrier modulation answer pool eas response format when the request frame is correctly received the lri512 generates a continuous stream of 256 bits at 0 using the one or two sub-carrier modu- lation at low data rate ended by 2 crc bytes. figure 43. pool eas frame exchange between vcd and lri512 request sof request_flags pool eas ic mfg code crc16 request eof 0x00 0xa2 0x02 16 bits request sof request_flags pool eas ic mfg code crc16 request eof 0x01 0xa2 0x02 16 bits ai06841 vcd lri512 t1 sof pool eas request eof 256 `o' using single sub-carrier modulation at low data rate
lri512 40/54 appendix a the following pseudo-code describes how the anti-collision could be implemented on the vcd, using recursive functions. algorithm for pulsed slots function push (mask, address) ; pushes on private stack function pop (mask, address) ; pops from private stack function pulse_next_pause ; generates a power pulse function store(lri512_uid) ; stores lri512_uid function poll_loop (sub_address_size as integer) pop (mask, address) mask = address & mask ; generates new mask ; send the request mode = anti-collision send_request (request_cmd, mode, mask length, mask value) for sub_address = 0 to (2^sub_address_size - 1) pulse_next_pause if no_collision_is_detected ; lri512 is inventoried then store (lri512_uid) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty ; if some collisions have been detected and then ; not yet processed, the function calls itself poll_loop (sub_address_size) ; recursively to process the last stored collision endif end poll_loop main_cycle: mask = null address = null push (mask, address) poll_loop(sub_address_size) end_main_cycle
41/54 lri512 appendix b the crc error detection method the cyclic redundancy check (crc) is calculat- ed on all data contained in a message, from the start of the flags through to the end of data. this crc is used from the vcd to the lri512, and from the lri512 to the vcd. table 54. crc definition to add extra protection against shift errors, a fur- ther transformation on the calculated crc is made. the ones complement of the calculated crc is the value attached to the message for transmission. for checking of received messages the two crc bytes are often also included in the re-calculation, for ease of use. in this case, given the expected value for the generated crc is the residue of f0b8h crc calculation example this example in c language illustrates one method of calculating the crc on a given set of bytes comprising a message. c-example to calculate or check the crc16 according to iso/iec 13239 #define polynomial0x8408// x^16 + x^12 + x^5 + 1 #define preset_value0xffff #define check_value0xf0b8 #define number_of_bytes4// example: 4 data bytes #define calc_crc1 #define check_crc0 void main() { unsigned int current_crc_value; unsigned char array_of_databytes[number_of_bytes + 2] = {1, 2, 3, 4, 0x91, 0x39}; int number_of_databytes = number_of_bytes; int calculate_or_check_crc; int i, j; calculate_or_check_crc = calc_crc; // calculate_or_check_crc = check_crc;// this could be an other example if (calculate_or_check_crc == calc_crc) { number_of_databytes = number_of_bytes; } else // check crc { number_of_databytes = number_of_bytes + 2; } current_crc_value = preset_value; for (i = 0; i < number_of_databytes; i++) { current_crc_value = current_crc_value ^ ((unsigned int)array_of_databytes[i]); for (j = 0; j < 8; j++) { if (current_crc_value & 0x0001) { crc definition crc type length polynomial direction preset residue iso/iec 13239 16 bits x 16 + x 12 + x 5 + 1 = ox8408 backward 0xffff 0xf0b8
lri512 42/54 current_crc_value = (current_crc_value >> 1) ^ polynomial; } else { current_crc_value = (current_crc_value >> 1); } } } if (calculate_or_check_crc == calc_crc) { current_crc_value = ~current_crc_value; printf ("generated crc is 0x%04x\n", current_crc_value); // current_crc_value is now ready to be appended to the data stream // (first lsbyte, then msbyte) } else // check crc { if (current_crc_value == check_value) { printf ("checked crc is ok (0x%04x)\n", current_crc_value); } else { printf ("checked crc is not ok (0x%04x)\n", current_crc_value); } } }
43/54 lri512 appendix c application family identifier (afi) the afi (application family identifier) represents the type of application targeted by the vcd and is used to extract from all the lri512 present only the lri512 meeting the required application crite- ria. it is programmed by the lri512 issuer (the pur- chaser of the lri512). once locked, it cannot be modified. the most significant nibble of afi is used to code one specific or all application families, as defined in table 55. the least significant nibble of afi is used to code one specific or all application sub-families. sub- family codes other than 0 are proprietary. table 55. afi coding note: x = 1h to fh, y = 1h to fh afi most significant nibble afi least significant nibble meaning viccs respond from examples / note 0 0 all families and sub-families no applicative preselection x 0 all sub-families of family x wide applicative preselection x y only the yth sub-family of family x 0 y proprietary sub-family y only 1 0, y transport mass transit, bus, airline,... 2 0, y financial iep, banking, retail,... 3 0, y identification access control,... 4 0, y telecomunication public telephony, gsm,... 5 0, y medical 6 0, y multimedia internet services.... 7 0, y gaming 8 0, y data storage portable files, ... 9 0, y item management a 0, y express parcels b 0, y postal services c 0, y airline bags d 0, y rfu e 0, y rfu f 0, y rfu
lri512 44/54 maximum rating stressing the device above the rating listed in the absolute maximum ratings table may cause per- manent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not im- plied. exposure to absolute maximum rating con- ditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality docu- ments. table 56. absolute maximum ratings note: 1. ipc/jedec j-std-020a 2. esd test: iso10373-7 specification symbol parameter condition min. max. unit t stg storage temperature w4 st antistatic bag, max 23 months 15 25 c sb mounted wafer in a wafer- sawing box (8"), max 25 wafers 15 25 c a1t/isor 40-60% rh, max 2 years 15 25 c a1s/isor reels in shrink film and packed in hexagonal cardboard box 15 25 c a2t/isok 40% rh, max 1 year 15 25 c c40 reels in st cardboard box 15 25 c v max maximum input voltage on ac0 / ac1 C7 7 v v esd electrostatic discharge voltage 2 a1t/isor iso 10373-7 C7000 7000 v a1s/isor iso 10373-7 C7000 7000 v a2t/isok iso 10373-7 C7000 7000 v c40 iso 10373-7 C7000 7000 v
45/54 lri512 dc and ac parameters this section summarizes the operating and mea- surement conditions, and the dc and ac charac- teristics of the device. the parameters in the dc and ac characteristic tables that follow are de- rived from tests performed under the measure- ment conditions summarized in the relevant tables. designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parame- ters. table 57. operating conditions symbol parameter min. max. unit t a ambient operating temperature a1t/isor C20 85 c a1s/isor C20 85 c a2t/isok C20 85 c c40 C20 85 c
lri512 46/54 figure 44. lri512 synchronous timing, transmit and receive figure 44 shows an ask m odulated signal, from the vcd to the lri512. the test condition for the ac/dc parameters are: C close coupling condition with tester antenna (1mm) C gives lri512 performance on tag antenna table 58. dc characteristics ai06680 ab t rff t rfr t rfsbl t max t min cd f cc symbol parameter test condition (in addition to those in table 57) min. typ. max. unit v cc regulated voltage 1.5 3.0 v v ret retromodulated induced voltage a1t/isor iso10373-7 10 mv a1s/isor iso10373-7 10 mv a2t/isok iso10373-7 10 mv c40 iso10373-7 10 mv i cc supply current (active in read) vcc = 3.0v 150 a i cc supply current (active in write) vcc = 3.0v 400 a c tun internal tuning capacitor f=13.56mhz for w4/22 18.5 pf c tun internal tuning capacitor f=13.56mhz for w4/30 26 pf
47/54 lri512 table 59. ac characteristics note: 1. p a min is the minimum h-field required to communicate with the lri512 p a max is the maximum h-field that the device can support before clamping the incoming signal symbol parameter test condition (in addition to those in table 57) min. typ. max. unit f cc external rf signal frequency 13.553 13.56 13.567 mhz mi carrier 10% carrier modulation index mi=(a-b)/(a+b) 10 30 % t rfr , t rff 10% rise and fall time 0 3.0 s t rfsbl 10% minimum pulse width for bit 7.1 9.44 s mi carrier 100% carrier modulation index mi=(a-b)/(a+b) 95 100 % t rfr , t rff 100% rise and fall time 0 3.5 s t rfsbl 100% minimum pulse width for bit 7.1 9.44 s t jit bit pulse jitter -2 +2 s t max maximum carrier rise time zero to maximum field strength induced voltage on coil 3 v/s t mincd minimum time from carrier generation to first data from h-field min 0.1 1 ms f sh subcarrier frequency high f cc /32 423.75 khz f sl subcarrier frequency low f cc /28 484.28 khz t 1 time for lri512 response 4224/f s 313 320.9 322 s t 2 time between commands 4224/f s 309 311.5 314 s r l resistive load (for modulation) 500 1000 2000 w p a h-field energy on lri512 antenna a1t/isor 0.15 5 a/m a1s/isor 0.15 5 a/m a2t/isok 0.15 5 a/m c40 1 5 a/m t w programming time 5ms
lri512 48/54 package mechanical a1t/isor C copper antenna, package outline note: drawing is not to scale. a1t/isor C copper antenna, package mechanical data symbol millimeters inches typ min max typ min max a1 (coil width) 45 44.5 45.5 1.772 1.752 1.791 a2 (coil length) 76 75.5 76.5 2.992 2.972 3.012 c (web width) 48 47.5 48.5 1.890 1.870 1.909 d (pitch) 96 95.5 96.5 3.780 3.760 3.800 e (coil distance from web edge) 1.5 1 2 0.059 0.039 0.079 (overall thickness of copper antenna coil) 0.110 0.090 0.130 0.004 0.003 0.005 (silicon thickness) 0.180 0.165 0.195 0.007 0.006 0.008 q (unloaded q value) 35 35 f nom (unloaded free-air resonance) 14.6 mhz 14.6 mhz ai06843 a2 d c e a1
49/54 lri512 a1s/isor C copper antenna, package outline note: drawing is not to scale. a1s/isor C copper antenna, package mechanical data symbol millimeters inches typ min max typ min max a1 (coil width) 45 44.5 45.5 1.772 1.752 1.791 a2 (coil length) 76 75.5 76.5 2.992 2.972 3.012 c (web width) 48 47.5 48.5 1.890 1.870 1.909 d (pitch) 96 95.5 96.5 3.780 3.760 3.800 e (coil distance from web edge) 1.5 1 2 0.059 0.039 0.079 (overall thickness of copper antenna coil) 0.110 0.090 0.130 0.004 0.003 0.005 (silicon thickness) 0.180 0.165 0.195 0.007 0.006 0.008 q (unloaded q value) 35 35 f nom (unloaded free-air resonance) 14.6 mhz 14.6 mhz ai06843 a2 d c e a1
lri512 50/54 a2t/isok C aluminium antenna, package outline note: drawing is not to scale. a2t/isok C aluminium antenna, package mechanical data symbol millimeters inches typ min max typ min max a1 (coil width) 45 44.5 45.5 1.772 1.752 1.791 a2 (coil length) 76 75.5 76.5 2.992 2.972 3.012 c (web width) 48 47.5 48.5 1.890 1.870 1.909 d (pitch) 96 95.5 96.5 3.780 3.760 3.800 e (coil distance from web edge) 1.5 1 2 0.059 0.039 0.079 (overall thickness of copper antenna coil) 0.100 0.080 0.120 0.004 0.003 0.005 (silicon thickness) 0.180 0.165 0.195 0.007 0.006 0.008 q (unloaded q value) f nom (unloaded free-air resonance) 14.6 mhz 14.6 mhz ai06844 a2 d c e a1
51/54 lri512 c40 C micromodule antenna, package outline note: drawing is not to scale. c40 C micromodule antenna, package mechanical data symbol millimeters inches typ min max typ min max a1 (coil width) 27.5 27.4 27.6 1.083 1.079 1.087 a2 (coil length) 27.5 27.4 27.6 1.083 1.079 1.087 c (web width) 35.0 34.9 35.1 1.378 1.374 1.382 d (pitch) 28.5 28.4 28.6 1.122 1.118 1.126 e (coil distance from web edge) 3.75 0.148 (overall thickness of copper antenna coil) 0.190 0.187 0.193 0.007 0.007 0.008 (silicon thickness) 0.180 0.165 0.195 0.007 0.006 0.008 q (unloaded q value) f nom (unloaded free-air resonance) 14.4 mhz 14.4 mhz ai06844 a2 d c e a1
lri512 52/54 part numbering table 60. ordering information scheme the notation used for the device number is as shown in table 60. for a list of available options (speed, package, etc.) or for further information on any aspect of this device, please see the current memory shortform catalogue, or contact your nearest st sales office, or email: memories.contactless@st.com example: lri512 - w4/22 delivery form w4/22 180 m m 15 m m unsawn wafer, 18.5 pf tuning capacitor w4/30 180 m m 15 m m unsawn wafer, 26 pf tuning capacitor sbn18/22 180 m m 15 m m sawn wafer with bumps, 18.5 pf tuning capacitor, 8-inch frame sbn16/22 180 m m 15 m m sawn wafer with bumps, 18.5 pf tuning capacitor, 6-inch frame a1t/isor iso copper antenna on tape a1s/isor iso copper adhesive antenna on tape a2t/isok iso aluminium antenna on tape c40 micromodule antenna on super 35mm tape
53/54 lri512 revision history table 61. document revision history date rev. description of revision 16-jul-2002 1.0 document written
lri512 54/54 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2002 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - unit ed states. www.st.com

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